absolute value
accumulation
scaling recommendations
using slope/bias encoding
accumulator data type
and feedback controller demo
addition
blockset rules
scaling recommendations
using slope/bias encoding
ALU's
arithmetic shift
autofixexp
automatic scaling
and feedback controller demo
and FixPt Look-Up Table (2D) block
and percent safety margin <1> <2>
interface
script
back propagation
FixPt Data Type Propagation block
FixPt Gateway Out block
FixPt Tapped Delay block
backward integrator realization
base data type
and feedback controller demo
binary point
bit
clear
hidden
mask
multipliers
set
shifts
bits
bitwise operation
block configuration
selecting a data type
selecting a scaling
block icon labels
block parameters
blocks
FixPt Absolute Value
FixPt Bitwise Operator
FixPt Constant
FixPt Conversion <1> <2>
FixPt Conversion Inherited
FixPt Data Type Propagation
FixPt Dead Zone
FixPt Dot Product
FixPt Dynamic Look-Up Table
FixPt FIR <1> <2>
FixPt Gain <1> <2>
FixPt Gateway In <1> <2>
FixPt Gateway In Inherited
FixPt Gateway Out
FixPt Integer Delay
FixPt Logical Operator
FixPt Look-Up Table
FixPt Look-Up Table (2-D)
FixPt Matrix Gain <1> <2>
FixPt MinMax
FixPt Multiport Switch
FixPt Product <1> <2> <3>
FixPt Relational Operator
FixPt Relay
FixPt Saturation
FixPt Sign
FixPt Sum <1> <2>
FixPt Switch
FixPt Tapped Delay
FixPt Unary Minus
FixPt Unit Delay
FixPt Zero-Order Hold
blockset library
Bode plot
boolean operation
bitwise
logical
broken links
built-in data types
ceil
chopping
clearing bits
code generation <1> <2>
and multiplication
and scaling
and signal conversions
and stored integer output
and summation
computational noise
and rounding
computational units
constant scaling for best precision
limitations for code generation
constant value
contiguous bits
conversions
fixed-point to fixed-point
fixed-point to fixed-point, inherited
parameter
signal
See also online conversion, offline conversion
converting old models
data types <1> <2>
built-in
display
fractional numbers
generalized fixed-point numbers
IEEE numbers
inherited
integers
overriding with doubles
propagation
selecting
dead zone
demos
denormalized numbers
derivative realization
filtered
development cycle
dialog box parameters
data type
lock output scaling
logging min/max data
overflow handling
overriding with doubles
rounding
scaling
digital controller
digital filter
direct form realization
and feedback controller demo
division
blockset rules
scaling recommendations <1> <2>
using slope/bias encoding
dot product
double bits <1> <2>
double-precision format
doubles override
Embedded-C Real-Time Target
encapsulation
encoding scheme
eps
examples
constant scaling for best precision
conversions and arithmetic operations
converting a built-in model to fixed-point
converting from doubles to fixed-point
division process
fixed-point format
fixed-point scaling
FixPt Bitwise Operator
FixPt FIR
FixPt Gateway In
FixPt Look-Up Table
FixPt Look-Up Table (2D)
generating pure integer code
limitations on precision and errors
limitations on range
maximizing precision
multiplication process
saturation and wrapping
selecting a measurement scale
shifting bits and the radix point
shifting bits but not the radix point
summation process
exceptional arithmetic
exponent for IEEE numbers
external mode
feedback design
filter
digital
lead-lag
filtered derivative realization
filters and systems
FIR
fix
fixed-point interface tool
and feedback controller demo
fixed-point numbers
general format
scaling
fixpt
fixpt_convert
fixpt_convert_prep
fixptbestexp
fixptbestprec
FixPtSimRanges
float <1> <2>
floating-point numbers
floor
forward integrator realization
fpupdate
fraction for IEEE numbers
fractional numbers
and guard bits
fractional slope
fxptdlg
gain
matrix gain
scaling recommendations <1> <2>
using slope/bias encoding
gateway
fixed-point to Simulink
Simulink to fixed-point
Simulink to fixed-point, inherited
generalized fixed-point numbers
Generic Real-Time Target
global override with doubles
guard bits <1> <2> <3>
GUI
block
See also fixed-point interface tool
help
hidden bit
icon labels
IEEE floating-point numbers
format
double precision
exponent
fraction
nonstandard
sign bit
single precision
precision
range
infinity <1> <2>
inherited
data types
by back-propagation
fixed-point to fixed-point conversion
scaling
by back-propagation
Simulink to fixed-point conversion
installation
integer delay
integers
and code generation
outputting large values
integrator realization
backward
forward
trapezoidal
interface
least significant bit
library <1> <2>
limit cycles
and feedback controller demo
lock output scaling
and feedback controller demo
logging
large integer values
overflows
simulation results <1> <2>
logical operation
logical shift
look-up table
1-D
2-D
dynamic
LSB. See least significant bit
MAC's
propagating data type information for
masking bits
matrix gain
maximum value
logging
measurement scales
mex xiii
minimum value
logging
modeling the system
most significant bit
MSB
multiplication
blockset rules
scaling recommendations <1> <2>
using slope/bias encoding
multiport switch
NaNs <1> <2>
nonstandard IEEE format
offline conversion
for addition and subtraction
for multiplication
for signals
online conversion
for addition and subtraction
for multiplication
for signals
online help
overflow <1> <2> <3>
and code generation
handling by fixed-point blocks
logging <1> <2>
overriding with doubles <1> <2>
global override
individual override
padding with trailing zeros
and feedback controller demo
parallel form realization
parameter conversion
See also conversions
percent safety margin
plot system interface
port data type display
precision
best
maximum
of fixed-point numbers
of IEEE floating-point numbers
prerequisites
propagation of data types
quantization
and feedback controller demo
and rounding
of a real-world value <1> <2>
radix point
radix point-only scaling
range
of fixed-point numbers
of IEEE floating-point numbers
RangeFactor
rapid simulation target
realizations
and data types
and scaling
derivative
design constraints
direct form
integrator
lead-lag filter
parallel form
series cascade form
state-space
Real-Time Workshop
ERT
external mode
GRT
Production Coder
rapid simulation target
Target Language Compiler
real-world value
as block input
relational operation
relay
release information
restoring broken links
round
rounding modes <1> <2>
and code generation
toward ceiling
toward floor
toward nearest
toward zero
rsim
RTW Production Coder
saturation <1> <2>
and feedback controller demo
scaling <1> <2>
and accumulation
and addition
and code generation
and division
and gain
and multiplication
constant scaling for best precision
inherited
locking
radix point-only <1> <2>
slope/bias <1> <2>
scientific notation
series cascade form realization
setting bits
sfix
sfrac
shifts
using the FixPt Conversion block
using the FixPt Gain block
showfixptsimranges <1> <2>
sign
extension
of input signal
sign bit for IEEE numbers
signal conversions
Simulink
built-in data types
converting built-in data types to fixed-point
converting built-in models to fixed-point
converting fixed-point data types to built-in
Simulink Accelerator
single-precision format
sint
slope/bias scaling
state-space realization
stored integer
as block input
as block output
subtraction
See also addition
switch
multiport
tapped delay
Target Language Compiler
targeting an embedded processor
design rules
operation assumptions
size assumptions
TLC file
trapezoidal integrator realization
truncation
two's complement
typographical conventions
ufix
ufrac
uint
unary minus
underflow
unit delay
updating old models
wrapping
zero order hold