Fixed-Point Blockset

Digital Controller Realization

The digital controller is implemented using a fixed-point direct form realization. The target is a 16-bit processor. Variables and coefficients are generally represented using 16 bits, especially if these quantities are stored in ROM or global RAM. Use of 32-bit numbers is limited to temporary variables that exist briefly in CPU registers or in a stack. The realization is shown below.

The realization consists of these blocks:

• FixPt Conversion

The Up Cast block connects the A/D hardware with the digital controller. It pads the output word of the A/D hardware with trailing zeros to a 16-bit number (the base data type). The Down Cast block represents taking the number from the CPU and storing it in RAM. The word size and precision are reduced to half that of the accumulator when converted back to the base data type.

• FixPt FIR

These blocks represent a weighted sum carried out in the CPU target. The word size and precision used in the calculations reflect those of the accumulator. The Numerator Terms block multiplies and accumulates the most recent inputs with the FIR numerator coefficients. The Denominator Terms block multiples and accumulates the most recent delayed inputs with the FIR denominator coefficients. The coefficients are stored in ROM using the base data type. The most recent inputs are stored in global RAM using the base data type.

• FixPt Sum

The Combine Terms block represents the accumulator in the CPU. Its word size and precision are twice that of the RAM (double bits).

• FixPt Unit Delay

The Prev Out block delays the feedback signal in memory by one sample period. The signals are stored in global RAM using the base data type.

Direct Form Realization

The controller directly implements this equation

where:

• u(k - 1) represents the input from the previous time step.
• y(k) represents the current output, and y(k - 1) represents the output from the previous time step.
• b_i represents the FIR numerator coefficients.
• a_i represents the FIR denominator coefficients.

The first summation in y(k) represents multiplication and accumulation of the most recent inputs and numerator coefficients in the accumulator. The second summation in y(k) represents multiplication and accumulation of the most recent inputs and denominator coefficients in the accumulator. Since the FIR coefficients, inputs, and outputs are all represented by 16-bit numbers (the base data type), any multiplication involving these numbers produces a 32-bit output (the accumulator data type).

Idealized Feedback Design

Simulation Results