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Store inputs in a FIFO register.
Library
Signal Management / Buffers
Description
The Queue block stores a sequence of input samples in a FIFO (first in, first out) register. The register capacity is set by the Register size parameter, and inputs can be scalars, vectors, or matrices.
The block pushes the input at the In
port onto the end of the queue when a trigger event is received at the Push
port. When a trigger event is received at the Pop
port, the block pops the first element off the queue and holds the Out
port at that value. The first input to be pushed onto the queue is always the first to be popped off.
A trigger event at the optional Clr
port (enabled by the Clear input check box) empties the queue contents. If Clear output port on reset is selected, then a trigger event at the Clr
port empties the queue and sets the value at the Out
port to zero. This setting also applies when a disabled subsystem containing the Queue block is reenabled; the Out
port value is only reset to zero in this case if Clear output port on reset is selected.
When two or more of the control input ports are triggered at the same time step, the operations are executed in the following order:
The triggering event for the Push
, Pop
, and Clr
ports is specified by the Trigger type pop-up menu, and can be one of the following:
The Push onto full register parameter specifies the block's behavior when a trigger is received at the Push
port but the register is full. The Pop empty register parameter specifies the block's behavior when a trigger is received at the Pop
port but the register is empty. The following options are available for both cases:
The Push onto full register parameter additionally offers the Dynamic reallocation option, which dynamically resizes the register to accept as many additional inputs as memory permits. To find out how many elements are on the queue at a given time, enable the Num
output port by selecting the Output number of register entries option.
Example 1
The table below illustrates the Queue block's operation for a Register size of 4
, Trigger type of Either edge, and Clear output port on reset enabled. Because the block triggers on both rising and falling edges in this example, each transition from 1
to 0
or 0
to 1
in the Push
, Pop
, and Clr
columns below represents a distinct trigger event. A 1
in the Empty
column indicates an empty queue, while a 1
in the Full
column indicates a full queue.
Note that at the last step shown, the Push
and Clr
ports are triggered simultaneously. The Clr
trigger takes precedence, and the queue is first cleared and then pushed.
Example 2
The dspqdemo
demo provides another example of Queue operation.
Dialog Box
Push
port when the register is full.Pop
port when the register is empty. Tunable.Empty
output port, which is high (1
) when the queue is empty, and low (0
) otherwise.Full
output port, which is high (1
) when the queue is full, and low (0
) otherwise. The Full
port remains low when Dynamic reallocation is selected from the Push onto full register parameter.Num
output port, which tracks the number of entries currently on the queue.Clr
input port, which empties the queue when the trigger specified by the Trigger type is received.Out
port to zero (in addition to clearing the queue) when a trigger is received at the Clr
input port. Tunable.See Also
Buffer |
DSP Blockset |
Delay Line |
DSP Blockset |
Stack |
DSP Blockset |
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